What is the equation for determining the speed in nano seconds of which your memories timings (cycles) will be multiplied by in order to get a total response time? For example, DDR 333Mhz 2-2-2-6 cycles every 6 nano seconds, and DDR 2 667Mhz 4-4-4-8 cycles every 3 nano seconds, as you can see raising the clock frequency cut the cycling nano seconds by half, and raised the cycles (timings). I just want to know how the actual number of nano seconds (3) was calculated.
How does memory cycles nano second timing get determined?
- Thread starter Mike
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